Intern, Logic Design (2020) – Santa Clara, CA

Ampere is designing the future of hyperscale cloud and edge computing with its 64-bit Arm server processor architecture. Born in and built for the cloud with a modern architecture, Ampere gives customers the freedom to accelerate the delivery of the most memory-intensive applications such as artificial intelligence, big data, machine learning and databases in the cloud. The Ampere eMAG family of products delivers the highest memory throughput and lowest TCO tailored for the emerging growth of cloud computing and next-generation data centers.


Our Story

Like the scientist behind its name, Ampere employees are innovators. We understand the needs of cloud computing and different software requirements. We are inventing what comes next and looking at everything from the structure of memory and how efficient the system is, to considerations on speed, cost of electricity and ability to cool. Power, size, weight and cost are driving the technology requirements and the innovation to come.

Our world class team of engineers, with depth and expertise in the cloud and semiconductor industries, is not only focused on the development of new semiconductor designs but also building out the first software ecosystem for Arm®-based server processors. Through the Ampere approach to the cloud and edge, we give our customers the freedom to challenge the status quo and accelerate next-generation data centers for the most memory-intensive applications. Given the challenge we have outlined, we are building a culture of entrepreneurs that ensure customers come first, proactively approaching industry challenges in the areas of security, power and performance, delivering results that matter most.

Job Description

We are a small motivated team passionately working in the development of high end cloud computing chips. We are seeking sharp, self-motivated and passionate logic design engineer to join our team to share the journey with us. In this role, you will be exposed to some of the most complex hardware technologies and challenges in the world. So come join us if you are passionate about digital logic design and want to explore and solve some of the challenges in the world of high end VLSI design.

Internship is full-time for Spring (January – May) in Santa Clara, CA.
No relocation is being provided.


Qualifications:

  • Very strong digital design fundamentals
  • Strong Verilog or System Verilog coding skills
  • Exposure to scripting languages like Perl, Python
  • Ability to work with a team and independently
  • Strong understanding of Clock domains, Synthesis, Static Timing Analysis and associated challenges are also highly desirable.
  • Candidate must be pursuing a Bachelor’s (Jr or Sr) or Master’s Degree.

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